The DRAM interface and the PHY (why a DDR3+ interface must be tuned at boot)
Submitted by peter_d_sherman. Hacker News recorded 12 points and 0 comments as of Nov 11, 2026 (UTC).
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points · 12 votes
2026-11-11 01:30:20.653Z
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Source votes: 12 votes (Nov 11, 2026 UTC; cumulative since publication)
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